Communication receivers sometimes use iterative decoding techniques. In particular, Error Correction Codes (ECC) such as Low Density Parity Check (LDPC) codes and Turbo codes are sometimes decoded using iterative processes. Decoding of LDPC codes is described, for example, by Richardson and Urbanke in “The Capacity of Low-Density Parity-Check Codes Under Message-Passing Decoding,” IEEE Transactions on Information Theory, volume 47, number 2, February, 2001, pages 599-618, which is incorporated herein by reference.
Iterative decoding and demodulation of LDPC codes is described, for example, by Hochwald and ten Brink in “Achieving Near Capacity on a Multiple-Antenna Channel,” IEEE Transactions on Communication, volume 51, March, 2003, pages 389-399; by Pusane et al., in “Multilevel Coding/Modulation Using LDPC Convolutional Codes,” Proceedings of the International Symposium on Information Theory and its Applications (ISITA), Parma, Italy, October, 2004, pages 685-689; and by Nana et al., in “Improved Decoding of LDPC Coded Modulations,” IEEE Communication Letters, volume 10, number 5, May, 2006, pages 375-377, which are incorporated herein by reference.
U.S. Patent Application Publication 2007/0124644, whose disclosure is incorporated herein by reference, describes methods for iterative metric updating when decoding LDPC coded signals and LDPC coded modulation signals. U.S. Patent Application Publication 2008/0263425, whose disclosure is incorporated herein by reference, describes a turbo-LDPC iterative decoding system. The system comprises a first shift register for storing bit estimates, a plurality of parity-check processing node banks for processing the bit estimates for generating messages, combiners for combining the messages with the bit estimates for generating updated bit estimates, and fixed permuters for permuting the updated bit estimates to facilitate storage and access of the bit estimates. A second shift register is provided for storing the messages, and a subtraction module subtracts messages generated a predetermined number of cycles earlier from the updated bit estimates.
U.S. Patent Application Publication 2005/0190868, whose disclosure is incorporated herein by reference, describes a scheme for iterative channel and interference estimation and decoding. Prior information for channel gain and interference is initially obtained based on received pilot symbols. Forward information for code bits corresponding to received data symbols is derived based on the received data symbols and the prior information, and then decoded to obtain feedback information for the code bits corresponding to the received data symbols. A-posteriori information for channel gain and interference for each received data symbol is derived based on the feedback information for that received data symbol. The a-posteriori information for the received data symbols and the prior information are combined to obtain updated information for channel gain and interference for each received data symbol.
Example LDPC codes and example methods for encoding and decoding LDPC codes are described, for example, in U.S. Pat. Nos. 6,829,308, 6,963,622, 7,020,829, 7,191,378, 7,203,887, 7,234,098, 7,237,174, 7,296,208, 7,334,181, 7,369,633, 7,376,883, 7,398,455, 7,403,574, whose disclosures are incorporated herein by reference. Lin and Ku describe a specific class of LDPC codes and a scheme for detecting successful decoding of these codes, in “Early Detection of Successful Decoding for Dual-Diagonal Block-Based LDPC Codes,” Electronics Letters, volume 44, number 23, November, 2008, which is incorporated herein by reference.
LDPC codes are used in a wide variety of applications, such as in Digital Video Broadcasting (DVB) satellite systems. The use of LDPC codes in DVB systems is specified, for example, by the European Telecommunications Standards Institute (ETSI) in standard EN 302 307 version 1.1.2, entitled “Digital Video Broadcasting (DVB); Second Generation Framing Structure, Channel Coding and Modulation Systems for Broadcasting, Interactive Services, News Gathering and Other Broadband Satellite Applications,” June, 2006, and in DVB document A122, entitled “Frame Structure Channel Coding and Modulation for a Second Generation Digital Terrestrial Television Broadcasting System (DVB-T2),” June, 2008, which are incorporated herein by reference.
As noted earlier, Turbo codes are sometimes demodulated using iterative techniques. Example techniques are described by Berrou et al., in “Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes,” Proceedings of the IEEE International Conference on Communication (ICC), Geneva, Switzerland, May, 1993, volume 2, pages 1064-1070, which is incorporated herein by reference.